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a minor bug.

if a switch is connected to one input of an XOR gate but the other input is left free, the output is low regardless of the switch state. (same if switch is replaced by clock). Other gates (OR for example) work correctly even if one input is left free.

thanks again for a cool app


it's a clean, visually intuitive simulator - i am using it for a high school class learning logic. thanks for making it available

2 things i wish it had:

1) a way to save the state. sometimes students don't finish a problem in one session and there is no way to save the partially constructed network. and of course there's no easy way for them to give me their finished work.

2) a "T" cable to tie inputs together (for example to make an inverter from a NAND gate. it IS possible to connect both inputs to the same switch but while the result works, it doesn't look the way we usually draw gates with bridged inputs.

thanks again for a very fun toy


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