Not my area but I don't think that's the case for the analog ICs, or the analog part of mixed ICs.
The constraints for generic digital logic soup are comparatively "simple" : make wires as short and neat as possible and then check the (simulated) physical timing characteristics.
Analog is more artistic since any noise or crosstalk degrades the signal irreversibly (for low noise stuff) and any wire is a transmission line (for high speed stuff).
Actually even for digital I'm sure you still have to do manual layout for the most critical pieces of high-performance designs (say a register file on a nvidia gpu).
The constraints for generic digital logic soup are comparatively "simple" : make wires as short and neat as possible and then check the (simulated) physical timing characteristics.
Analog is more artistic since any noise or crosstalk degrades the signal irreversibly (for low noise stuff) and any wire is a transmission line (for high speed stuff).
Actually even for digital I'm sure you still have to do manual layout for the most critical pieces of high-performance designs (say a register file on a nvidia gpu).