I don't know if the behavior you describe is commonplace on other cpus, but it seems quite reasonable, if only because it greatly reduces the complexity of the emulator because not every instruction has to touch every status register. What would JMP set the Z(ero) or N(egative) status bits to anyway?
I've only briefly glanced through the dcpu-16 spec, but it doesn't seem to explicitly call Z or N by the names I've imputed, I think they're just regular registers that get used for a certain purpose sometimes.
"this _sounds_ like nitpicking"
when emulating a cpu, there's nothing but nits. pick away :)
I've only briefly glanced through the dcpu-16 spec, but it doesn't seem to explicitly call Z or N by the names I've imputed, I think they're just regular registers that get used for a certain purpose sometimes.
"this _sounds_ like nitpicking"
when emulating a cpu, there's nothing but nits. pick away :)